mirror of
https://github.com/php/php-src.git
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369 lines
10 KiB
C
369 lines
10 KiB
C
/*
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* IR - Lightweight JIT Compilation Framework
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* (IR saver)
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* Copyright (C) 2022 Zend by Perforce.
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* Authors: Dmitry Stogov <dmitry@php.net>
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*/
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#include "ir.h"
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#include "ir_private.h"
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void ir_print_proto(const ir_ctx *ctx, ir_ref func_proto, FILE *f)
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{
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ir_ref j;
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if (func_proto) {
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const ir_proto_t *proto = (const ir_proto_t *)ir_get_str(ctx, func_proto);
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fprintf(f, "(");
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if (proto->params_count > 0) {
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fprintf(f, "%s", ir_type_cname[proto->param_types[0]]);
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for (j = 1; j < proto->params_count; j++) {
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fprintf(f, ", %s", ir_type_cname[proto->param_types[j]]);
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}
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if (proto->flags & IR_VARARG_FUNC) {
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fprintf(f, ", ...");
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}
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} else if (proto->flags & IR_VARARG_FUNC) {
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fprintf(f, "...");
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}
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fprintf(f, "): %s", ir_type_cname[proto->ret_type]);
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if (proto->flags & IR_FASTCALL_FUNC) {
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fprintf(f, " __fastcall");
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} else if (proto->flags & IR_BUILTIN_FUNC) {
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fprintf(f, " __builtin");
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}
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} else {
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fprintf(f, "(): int32_t");
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}
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}
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static void ir_save_dessa_moves(const ir_ctx *ctx, int b, ir_block *bb, FILE *f)
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{
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uint32_t succ;
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ir_block *succ_bb;
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ir_use_list *use_list;
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ir_ref k, i, *p, use_ref, input;
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ir_insn *use_insn;
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IR_ASSERT(bb->successors_count == 1);
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succ = ctx->cfg_edges[bb->successors];
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succ_bb = &ctx->cfg_blocks[succ];
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IR_ASSERT(succ_bb->predecessors_count > 1);
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use_list = &ctx->use_lists[succ_bb->start];
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k = ir_phi_input_number(ctx, succ_bb, b);
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for (i = use_list->count, p = &ctx->use_edges[use_list->refs]; i > 0; p++, i--) {
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use_ref = *p;
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use_insn = &ctx->ir_base[use_ref];
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if (use_insn->op == IR_PHI) {
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input = ir_insn_op(use_insn, k);
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if (IR_IS_CONST_REF(input)) {
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fprintf(f, "\t# DESSA MOV c_%d", -input);
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} else if (ctx->vregs[input] != ctx->vregs[use_ref]) {
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fprintf(f, "\t# DESSA MOV d_%d {R%d}", input, ctx->vregs[input]);
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} else {
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continue;
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}
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if (ctx->regs) {
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int8_t *regs = ctx->regs[use_ref];
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int8_t reg = regs[k];
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if (reg != IR_REG_NONE) {
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fprintf(f, " {%%%s%s}", ir_reg_name(IR_REG_NUM(reg), ctx->ir_base[input].type),
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(reg & (IR_REG_SPILL_LOAD|IR_REG_SPILL_SPECIAL)) ? ":load" : "");
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}
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}
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fprintf(f, " -> d_%d {R%d}", use_ref, ctx->vregs[use_ref]);
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if (ctx->regs) {
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int8_t reg = ctx->regs[use_ref][0];
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if (reg != IR_REG_NONE) {
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fprintf(f, " {%%%s%s}", ir_reg_name(IR_REG_NUM(reg), ctx->ir_base[use_ref].type),
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(reg & (IR_REG_SPILL_STORE|IR_REG_SPILL_SPECIAL)) ? ":store" : "");
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}
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}
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fprintf(f, "\n");
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}
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}
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}
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void ir_save(const ir_ctx *ctx, uint32_t save_flags, FILE *f)
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{
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ir_ref i, j, n, ref, *p;
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ir_insn *insn;
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uint32_t flags;
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bool first;
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fprintf(f, "{\n");
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for (i = IR_UNUSED + 1, insn = ctx->ir_base - i; i < ctx->consts_count; i++, insn--) {
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fprintf(f, "\t%s c_%d = ", ir_type_cname[insn->type], i);
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if (insn->op == IR_FUNC) {
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fprintf(f, "func %s%s",
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(save_flags & IR_SAVE_SAFE_NAMES) ? "@" : "",
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ir_get_str(ctx, insn->val.name));
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ir_print_proto(ctx, insn->proto, f);
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} else if (insn->op == IR_SYM) {
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fprintf(f, "sym(%s%s)",
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(save_flags & IR_SAVE_SAFE_NAMES) ? "@" : "",
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ir_get_str(ctx, insn->val.name));
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} else if (insn->op == IR_FUNC_ADDR) {
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fprintf(f, "func *");
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ir_print_const(ctx, insn, f, true);
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ir_print_proto(ctx, insn->proto, f);
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} else {
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ir_print_const(ctx, insn, f, true);
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}
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fprintf(f, ";\n");
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}
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for (i = IR_UNUSED + 1, insn = ctx->ir_base + i; i < ctx->insns_count;) {
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flags = ir_op_flags[insn->op];
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if ((save_flags & IR_SAVE_CFG)
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&& ctx->cfg_map
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&& (int32_t)ctx->cfg_map[i] > 0 /* the node may be scheduled incompletely */
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&& ctx->cfg_blocks[ctx->cfg_map[i]].start == i) {
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uint32_t b = ctx->cfg_map[i];
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ir_block *bb = &ctx->cfg_blocks[b];
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fprintf(f, "#BB%d: end=l_%d", b, bb->end);
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if (bb->flags & IR_BB_UNREACHABLE) {
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fprintf(f, ", U");
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}
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if (bb->dom_parent > 0) {
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fprintf(f, ", idom=BB%d(%d)", bb->dom_parent, bb->dom_depth);
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}
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if (bb->loop_depth != 0) {
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if (bb->flags & IR_BB_LOOP_HEADER) {
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if (bb->loop_header > 0) {
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fprintf(f, ", loop=HDR,BB%d(%d)", bb->loop_header, bb->loop_depth);
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} else {
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IR_ASSERT(bb->loop_depth == 1);
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fprintf(f, ", loop=HDR(%d)", bb->loop_depth);
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}
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} else {
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IR_ASSERT(bb->loop_header > 0);
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fprintf(f, ", loop=BB%d(%d)", bb->loop_header, bb->loop_depth);
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}
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}
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if (bb->flags & IR_BB_IRREDUCIBLE_LOOP) {
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fprintf(f, ", IRREDUCIBLE");
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}
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if (bb->predecessors_count) {
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uint32_t i;
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fprintf(f, ", pred(%d)=[BB%d", bb->predecessors_count, ctx->cfg_edges[bb->predecessors]);
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for (i = 1; i < bb->predecessors_count; i++) {
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fprintf(f, ", BB%d", ctx->cfg_edges[bb->predecessors + i]);
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}
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fprintf(f, "]");
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}
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if (bb->successors_count) {
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uint32_t i;
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fprintf(f, ", succ(%d)=[BB%d", bb->successors_count, ctx->cfg_edges[bb->successors]);
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for (i = 1; i < bb->successors_count; i++) {
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fprintf(f, ", BB%d", ctx->cfg_edges[bb->successors + i]);
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}
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fprintf(f, "]");
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}
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fprintf(f, "\n");
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}
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if (flags & IR_OP_FLAG_CONTROL) {
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if (!(flags & IR_OP_FLAG_MEM) || insn->type == IR_VOID) {
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fprintf(f, "\tl_%d = ", i);
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} else {
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fprintf(f, "\t%s d_%d", ir_type_cname[insn->type], i);
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if (save_flags & IR_SAVE_REGS) {
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if (ctx->vregs && ctx->vregs[i]) {
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fprintf(f, " {R%d}", ctx->vregs[i]);
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}
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if (ctx->regs) {
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int8_t reg = ctx->regs[i][0];
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if (reg != IR_REG_NONE) {
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fprintf(f, " {%%%s%s}", ir_reg_name(IR_REG_NUM(reg), insn->type),
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(reg & (IR_REG_SPILL_STORE|IR_REG_SPILL_SPECIAL)) ? ":store" : "");
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}
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}
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}
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fprintf(f, ", l_%d = ", i);
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}
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} else {
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fprintf(f, "\t");
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if (flags & IR_OP_FLAG_DATA) {
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fprintf(f, "%s d_%d", ir_type_cname[insn->type], i);
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if (save_flags & IR_SAVE_REGS) {
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if (ctx->vregs && ctx->vregs[i]) {
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fprintf(f, " {R%d}", ctx->vregs[i]);
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}
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if (ctx->regs) {
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int8_t reg = ctx->regs[i][0];
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if (reg != IR_REG_NONE) {
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fprintf(f, " {%%%s%s}", ir_reg_name(IR_REG_NUM(reg), insn->type),
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(reg & (IR_REG_SPILL_STORE|IR_REG_SPILL_SPECIAL)) ? ":store" : "");
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}
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}
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}
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fprintf(f, " = ");
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}
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}
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fprintf(f, "%s", ir_op_name[insn->op]);
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n = ir_operands_count(ctx, insn);
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if ((insn->op == IR_MERGE || insn->op == IR_LOOP_BEGIN) && n != 2) {
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fprintf(f, "/%d", n);
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} else if ((insn->op == IR_CALL || insn->op == IR_TAILCALL) && n != 2) {
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fprintf(f, "/%d", n - 2);
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} else if (insn->op == IR_PHI && n != 3) {
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fprintf(f, "/%d", n - 1);
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} else if (insn->op == IR_SNAPSHOT) {
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fprintf(f, "/%d", n - 1);
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}
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first = 1;
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for (j = 1, p = insn->ops + 1; j <= n; j++, p++) {
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uint32_t opnd_kind = IR_OPND_KIND(flags, j);
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ref = *p;
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if (ref) {
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switch (opnd_kind) {
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case IR_OPND_DATA:
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if (IR_IS_CONST_REF(ref)) {
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fprintf(f, "%sc_%d", first ? "(" : ", ", -ref);
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} else {
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fprintf(f, "%sd_%d", first ? "(" : ", ", ref);
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}
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if (save_flags & IR_SAVE_REGS) {
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if (ctx->vregs && ref > 0 && ctx->vregs[ref]) {
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fprintf(f, " {R%d}", ctx->vregs[ref]);
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}
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if (ctx->regs) {
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int8_t *regs = ctx->regs[i];
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int8_t reg = regs[j];
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if (reg != IR_REG_NONE) {
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fprintf(f, " {%%%s%s}", ir_reg_name(IR_REG_NUM(reg), ctx->ir_base[ref].type),
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(reg & (IR_REG_SPILL_LOAD|IR_REG_SPILL_SPECIAL)) ? ":load" : "");
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}
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}
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}
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first = 0;
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break;
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case IR_OPND_CONTROL:
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case IR_OPND_CONTROL_DEP:
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case IR_OPND_CONTROL_REF:
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fprintf(f, "%sl_%d", first ? "(" : ", ", ref);
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first = 0;
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break;
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case IR_OPND_STR:
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fprintf(f, "%s\"%s\"", first ? "(" : ", ", ir_get_str(ctx, ref));
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first = 0;
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break;
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case IR_OPND_PROTO:
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fprintf(f, "%sfunc ", first ? "(" : ", ");
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ir_print_proto(ctx, ref, f);
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break;
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case IR_OPND_PROB:
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if (ref == 0) {
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break;
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}
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IR_FALLTHROUGH;
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case IR_OPND_NUM:
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fprintf(f, "%s%d", first ? "(" : ", ", ref);
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first = 0;
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break;
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}
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} else if (opnd_kind == IR_OPND_NUM) {
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fprintf(f, "%s%d", first ? "(" : ", ", ref);
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first = 0;
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} else if (j != n &&
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(IR_IS_REF_OPND_KIND(opnd_kind) || (opnd_kind == IR_OPND_UNUSED && p[n-j]))) {
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fprintf(f, "%snull", first ? "(" : ", ");
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first = 0;
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}
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}
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if (first) {
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fprintf(f, ";");
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} else {
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fprintf(f, ");");
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}
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first = 1;
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if (((flags & IR_OP_FLAG_DATA) || ((flags & IR_OP_FLAG_MEM) && insn->type != IR_VOID)) && ctx->binding) {
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ir_ref var = ir_binding_find(ctx, i);
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if (var) {
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IR_ASSERT(var < 0);
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fprintf(f, " # BIND(0x%x);", -var);
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first = 0;
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}
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}
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if ((save_flags & IR_SAVE_CFG_MAP)
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&& ctx->cfg_map
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&& ctx->cfg_map[i] > 0) { /* the node may be scheduled incompletely */
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if (first) {
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fprintf(f, " #");
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first = 0;
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}
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fprintf(f, " BLOCK=BB%d;", ctx->cfg_map[i]);
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}
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if ((save_flags & IR_SAVE_RULES)
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&& ctx->rules) {
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uint32_t rule = ctx->rules[i];
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uint32_t id = rule & IR_RULE_MASK;
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if (first) {
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fprintf(f, " #");
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first = 0;
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}
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if (id < IR_LAST_OP) {
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fprintf(f, " RULE(%s", ir_op_name[id]);
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} else {
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IR_ASSERT(id > IR_LAST_OP /*&& id < IR_LAST_RULE*/);
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fprintf(f, " RULE(%s", ir_rule_name[id - IR_LAST_OP]);
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}
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if (rule & IR_FUSED) {
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fprintf(f, ":FUSED");
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}
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if (rule & IR_SKIPPED) {
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fprintf(f, ":SKIPPED");
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}
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if (rule & IR_SIMPLE) {
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fprintf(f, ":SIMPLE");
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}
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fprintf(f, ");");
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}
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if ((save_flags & IR_SAVE_USE_LISTS)
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&& ctx->use_lists
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&& ctx->use_lists[i].count) {
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ir_use_list *use_list = &ctx->use_lists[i];
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ir_ref n = use_list->count;
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ir_ref *p = ctx->use_edges + use_list->refs;
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if (first) {
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fprintf(f, " #");
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first = 0;
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}
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fprintf(f, " USE_LIST(%d)=[%05d", n, *p);
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for (p++, n--; n; p++, n--) {
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fprintf(f, ", %05d", *p);
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}
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fprintf(f, "];");
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}
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fprintf(f, "\n");
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if ((save_flags & (IR_SAVE_CFG|IR_SAVE_REGS)) == (IR_SAVE_CFG|IR_SAVE_REGS)
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&& ctx->cfg_map
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&& ctx->cfg_map[i]
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&& ctx->cfg_blocks[ctx->cfg_map[i]].end == i) {
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uint32_t b = ctx->cfg_map[i];
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ir_block *bb = &ctx->cfg_blocks[b];
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if (bb->flags & IR_BB_DESSA_MOVES) {
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ir_save_dessa_moves(ctx, b, bb, f);
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}
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}
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n = ir_insn_inputs_to_len(n);
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i += n;
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insn += n;
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}
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fprintf(f, "}\n");
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}
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