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24 Commits

Author SHA1 Message Date
Chen, Hu d8de067b0f JIT: Add IBT support (#8774) 
Indirect Branch Tracking (IBT) is part of Intel's Control-Flow
Enforcement Technology (CET). IBT is hardware based, forward edge
Control-Flow-Integrity mechanism where any indirect CALL/JMP must target
an ENDBR instruction or suffer #CP.

This commit adds IBT support for JIT:
1. Add endbr32/64 instruction in Dynasm.
2. Insert endbr32/64 in indirect branch target for jitted code.

gcc support CET since v8.1 and set it to default since gcc 11. With this
commit, endbr is inserted in jitted code if PHP is compiled with "gcc
-fcf-protection=full/branch".

Signed-off-by: Chen, Hu <hu1.chen@intel.com>
 2022-06-28 08:42:19 +03:00
Ilija Tovilo 3f557ebd77 Revert "JIT: Add IBT support (#8636)" 
This reverts commit c1fcd45eeb.

Closes GH-8711
 2022-06-06 11:59:26 +02:00
Chen, Hu c1fcd45eeb JIT: Add IBT support (#8636) 
Indirect Branch Tracking (IBT) is part of Intel's Control-Flow
Enforcement Technology (CET). IBT is hardware based, forward edge
Control-Flow-Integrity mechanism where any indirect CALL/JMP must target
an ENDBR instruction or suffer #CP.

This commit adds IBT support for JIT:
1. Add endbr32/64 instruction in Dynasm.
2. Insert endbr32/64 in indirect branch target for jitted code.

gcc support CET since v8.1 and set it to default since gcc 11. With this
commit, endbr is inserted in jitted code if PHP is compiled with "gcc
-fcf-protection=full/branch".

Signed-off-by: Chen, Hu <hu1.chen@intel.com>
 2022-05-31 09:29:40 +03:00
Mike Pall 58040f257c DynASM/x86: Add missing escape in pattern. 2021-07-28 17:13:08 +03:00
Dmitry Stogov 28f6a2ba6e Merge branch 'PHP-8.0' 
* PHP-8.0:
  Avoid ASAN integer overflow warnings
 2021-07-19 14:55:07 +03:00
Dmitry Stogov 15abbea5e7 Avoid ASAN integer overflow warnings 2021-07-19 14:53:23 +03:00
Mike Pall 2963214c15 DynASM/ARM64: Fix LSL/BFI* encoding with variable shifts. 2021-06-07 09:36:50 +03:00
Dmitry Stogov 88631e329b DynASM/ARM64: Fix ADRP encoding with absolute address. 
(Switch to Mike Pall's version)
 2021-05-24 10:17:52 +03:00
Dmitry Stogov d52fdd5056 DynASM/ARM64: Fixed incorrect ADRP instruction encoding (-4 => +4) 2021-05-19 18:21:01 +03:00
Dmitry Stogov dec7b7493b DynASM/ARM64: Fixed incorrect ADRP instruction encoding 
See: https://developer.arm.com/documentation/ddi0596/2021-03/Base-Instructions/ADRP--Form-PC-relative-address-to-4KB-page-
 2021-05-19 11:51:30 +03:00
Dmitry Stogov 0e8fc156f8 DynASM/ARM64: Add abiulity to plug-in generation of veneers to perform long jumps. 2021-05-18 15:32:35 +03:00
Mike Pall 16d59a59c8 DynASM: Bump version to 1.5.0. 2021-05-12 13:40:13 +03:00
Mike Pall 5f44ed55c4 DynASM/ARM64: Add .long expr. Add .quad/.addr expr + refs. 
Suggested by Dmitry Stogov, Hao Sun and Nick Gasson.
 2021-05-12 13:36:32 +03:00
Dmitry Stogov 4a5074154b DynASM/x86: Fix x64 .aword refs. Add .qword, .quad, .addr and .long. 
(Switch to .aword implementation by Make Pall)
 2021-05-12 13:32:06 +03:00
Mike Pall 83b01a920e DynASM: Fix global label references 
ARM64 patch contributed by Hao Sun and Nick Gasson.
 2021-03-31 23:55:36 +03:00
Mike Pall 0b4f83f68f DynASM/ARM64: Add VREG support. 
Contributed by Hao Sun and Nick Gasson.
 2021-03-31 23:54:22 +03:00
Dmitry Stogov b428c51aea Merge upstream DynAsm changes from LuaJIT 2021-03-31 23:51:19 +03:00
Dmitry Stogov ddba2a705e Better support for 64-bit .aword constants 2020-07-14 15:14:21 +03:00
Nikita Popov ad6605317c Support JIT jumptables on x64 2020-07-09 11:22:53 +03:00
Nikita Popov e88c7bf5c7 Fix signed integer overflow UB in dasm 
Should hopefully fix the ubsan and community builds.
 2020-03-23 11:12:42 +01:00
Nikita Popov 6766b5f9bc Fix pointer UB in dynasm 
Looks like newer GCC versions started warning about this.
 2020-03-23 11:03:56 +01:00
Máté Kocsis afdaa91170 Fix #78880: Final spelling fixes 2020-01-16 19:14:31 +01:00
Nikita Popov 291eb19419 Dasm: Perform unaligned stores through unaligned pointers 2019-06-21 09:47:25 +02:00
Dmitry Stogov 9a06876072 Added JIT compiler for x86 and x86_64 2019-04-01 10:27:11 +03:00