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Commit Graph

4258 Commits

Author SHA1 Message Date
Nikita Popov
a30fab57eb Make can_elide_return_type_check() more robust
Rather than using def_info, check against the actual arg_info type.
As it is stored as a type mask nowadays, this is not much harder,
but more general and more robust as we don't need to deal with
inaccurate cases.
2021-06-18 11:17:32 +02:00
Dmitry Stogov
d72c320ff6 JIT/ARM64: Fixed possible incorrect register allocation 2021-06-17 18:43:15 +03:00
Dmitry Stogov
c02d7c4de8 Merge branch 'PHP-8.0'
* PHP-8.0:
  JIT/x86: Fixed possible incorrect register allocation
2021-06-17 18:42:57 +03:00
Dmitry Stogov
ced8e88438 JIT/x86: Fixed possible incorrect register allocation 2021-06-17 18:42:11 +03:00
Dmitry Stogov
82bcc9b497 JIT/ARM64: Fixed "may be used uninitialized" compilation warning 2021-06-17 15:08:14 +03:00
Dmitry Stogov
6442cbfbc4 Merge branch 'PHP-8.0'
* PHP-8.0:
  JIT: Fixed failures of tracing JIT with CALL VM
2021-06-17 14:26:36 +03:00
Dmitry Stogov
1082669e24 JIT: Fixed failures of tracing JIT with CALL VM
This fixes:
- tests/lang/bug28800.phpt
- Zend/tests/settype_resource.phpt
- Zend/tests/type_declarations/scalar_return_basic_64bit.phpt
2021-06-17 14:21:40 +03:00
Dmitry Stogov
cc0aac3f73 Merge branch 'PHP-8.0'
* PHP-8.0:
  Fixed incorrect type inference for "(array)$null".
2021-06-17 13:05:45 +03:00
Dmitry Stogov
df16fd149b Fixed incorrect type inference for "(array)$null". 2021-06-17 13:03:09 +03:00
Dmitry Stogov
3a78259525 JIT: Avoid too aggressive loop unrolling
This fixes tests/func/010.phpt failure with tracing JIT on ARM64.
2021-06-16 16:44:27 +03:00
Nikita Popov
591dcdbdb0 Use different error condition in ACCEL_LOG_FATAL test
This test fails on s390x with opcache. Presumably the large allocation
works fine there as long as it's not used.

Switch to a different error condition that produces a more reliable
failure.
2021-06-16 13:08:54 +02:00
Dmitry Stogov
8ae06582c6 Fixed incorrect map_ptr slots counting 2021-06-16 11:33:43 +03:00
Nikita Popov
7485978339 Migrate SKIPIF -> EXTENSIONS (#7138)
This is an automated migration of most SKIPIF extension_loaded checks.
2021-06-11 11:57:42 +02:00
Dmitry Stogov
bd98d84e57 Reorder conditions and always mark methods in SHM as ZEND_ACC_IMMUTABLE 2021-06-10 22:19:37 +03:00
Dmitry Stogov
b0dcc4c060 Functions with static variables are not separated anymore.
9a1da9f61f missed this part.
2021-06-10 20:57:43 +03:00
Nikita Popov
67cf04f791 Merge branch 'PHP-7.4' into PHP-8.0
* PHP-7.4:
  Mitigation for bug #81096
2021-06-10 10:54:21 +02:00
Nikita Popov
3f4bc94b00 Mitigation for bug #81096
This issue is properly fixed by GH-7121 on master. For older
branches, disable the use of range information in SCCP, to
reduce impact of potentially incorrect ranges.
2021-06-10 10:52:53 +02:00
Dmitry Stogov
7368d0c418 Fixed bug #81096: Inconsistent range inferece for variables passed by reference
Detect references before range inference and exclude them from range
inference.
2021-06-10 11:43:15 +03:00
sy-records
9333a22fa4 Fix typo 2021-06-10 10:24:41 +02:00
Dmitry Stogov
539948924c Typo 2021-06-09 17:50:16 +03:00
Dmitry Stogov
cd90655ebc JIT/ARM64: Remove redundand x86 specific optimization for recursive calls
On ARM64 we always load "func" into REG0
2021-06-09 16:55:51 +03:00
Dmitry Stogov
af319b072a JIT/ARM64: Improve JIT for MOD instruction.
Eliminate x86 specific register constrints (idiv imlicitly used
%eax and %rdx). On ARM64 we use reserved TMP registers.
2021-06-09 15:17:51 +03:00
Dmitry Stogov
62e0b83204 JIT/x86: Reuse code when MOD is going to be converted to AND. 2021-06-09 15:15:06 +03:00
Dmitry Stogov
3fa0c99a1b JIT/AArch64: Use only reserved TMP registers for EG(vm_interrupt) checks.
This removes limitation of REG0 usage for register-allocation.
2021-06-09 12:43:13 +03:00
Dmitry Stogov
029d06992e JIT/AArch64: Use only reserved TMP registers for EG(jit_trace_num) assignment.
This eliminates a need for checking CPU registers used at the entry to a
side trace.
2021-06-09 12:02:11 +03:00
Hao Sun
ac80aeb3ac JIT/AArch64: Use 'tbnz/tbz' to check the signedness (#7123)
'tbnz/tbz' instruction can be used to check whether a given W or X
register value is negative or positive.

For example,
    ```
    tst x0, x0
    blt >1
    ```
can be optimized as `tbnz x0, #63, >1`

It's important to note that the jump range of 'tbnz/tbz' is limited, and
it's better NOT to use 'tbnz/tbz' if the target of 'b.cond' is a label
in section .cold_code or a global label, such as the instruction
sequence `tst RETVALw, RETVALw; blt ->trace_halt` at function
zend_jit_trace_exit_stub(), and the instruction sequence `tst REG0,
  REG0; blt >7` at function zend_jit_incdec_obj().

Minor updates:
Use macros BW_OP_32_WITH_CONST and GC_ADDREF at function
zend_jit_push_call_frame().

Change-Id: I1597609bdabf55ea2f9d24528e7a037bc3e5c3a1
2021-06-09 16:30:25 +08:00
Hao Sun
c1bf4b3ed3 JIT/AArch64: Fix codestyle issues (#7125)
Fix codestyle issues, such as aligning comments, changing whitespace to
tab, adding necessary whitespace.

Change-Id: I0c6ae1e5d87a0f6832bc776294558d48a9b5d420
2021-06-09 14:57:09 +08:00
Ayesh Karunaratne
b8e380ab09 Update deprecation message for incompatible float to int conversion
Updates the deprecation message for implicit incompatible float to int conversion from:

```
Implicit conversion from non-compatible float %.*H to int in %s on line %d
```

to

```
Implicit conversion from float %.*H to int loses precision in %s on line %d
```

Related: #6661
2021-06-07 14:36:11 +02:00
Dmitry Stogov
9c7797eb09 JIT/AArch64: Complete logical_immediate_p() using DynAsm helpers 2021-06-07 12:22:58 +03:00
Dmitry Stogov
4e0165e779 JIT/AArch64: Use LSL instruction (DynAsm was fixed by
2963214c15)
2021-06-07 11:24:34 +03:00
Hao Sun
c995a359ff JIT/AArch64: Use 'shifted register' if available (#7108)
One shift instruction can be saved if 'shifted register' is used.

It's worth noting that the destination register of previous shift
instruction doesn't hold the shift result any longer now. And we have to
guarantee that 'shifted register' mode is applied to all the use sites
of this destination register.

Besides, several code-style issues are fixed.

Change-Id: I8bcdd092253d342d383732a926512e761e453808
2021-06-07 15:52:03 +08:00
Hao Sun
28b4f58d3b JIT/AArch64: Optimize add+ldr to ldr (#7109)
This patch is trivial.

Change-Id: I51b8eb5f12446643a53cc569d9398d0941a2f588
2021-06-07 15:51:34 +08:00
Mike Pall
2963214c15 DynASM/ARM64: Fix LSL/BFI* encoding with variable shifts. 2021-06-07 09:36:50 +03:00
Hao Sun
d1e5b0e699 JIT/AArch64: [macos] Remove Clang warning due to -Wincompatible-pointer-types (#7098)
The following warning message would be produced for macOS on Apple
silicon.

```
php-src/ext/opcache/jit/zend_jit_arm64.dasc:15356:79: warning: incompatible pointer types passing 'ptrdiff_t *' (aka 'long *') to parameter of type 'int64_t *'
      (aka 'long long *') [-Wincompatible-pointer-types]
                        const char *name = zend_jit_disasm_find_symbol((ptrdiff_t)cp + offset - 4, &offset);
                                                                                                   ^~~~~~~
ext/opcache/jit/zend_jit_disasm.c:210:58: note: passing argument to parameter 'offset' here
                                               int64_t  *offset) {

                                                  ^
```

Flag -Wincompatible-pointer-types is enabled by default in Clang [1],
but not in GCC [2].

Adding explicit type conversion would remove this warning.

[1]
https://releases.llvm.org/10.0.0/tools/clang/docs/DiagnosticsReference.html#wincompatible-pointer-types
[2]
https://gcc.gnu.org/onlinedocs/gcc-9.1.0/gcc/Warning-Options.html#Warning-Options

Change-Id: Ia0777a5731ba8f0764e232c0d47aeaab076d13f5
2021-06-04 16:40:49 +08:00
Dmitry Stogov
b15a8e6cde JIT/AArch64: Improved code generation for SL/SR and register allocation (#7096)
- perform constant shift by single instruction
  TODO: DynAsm: can't encode "lsl x0, x0, #var" !!!
- avoid usage of REG1 for variable shift (it was x86 limitation)
- enable register reuse for SL/SR instructions
- remove special scratch register handling for SL/SR (it was x86
  limitation)
- Remove need for extra scratch registers. AArch64 JIT backend
  don't use extra register for constants. It uses reserved TMP
  registers.
2021-06-04 09:32:23 +03:00
Dmitry Stogov
643f3c2935 "http://" -> "https://" 2021-06-03 14:27:41 +03:00
Dmitry Stogov
c658216425 JIT Refactoring:
- Move duplicate system independent functions from zend_jit_x86.dasc and
  zend_jit_arm64.dasc into zend_jit.c
  * zend_jit_is_constant_cmp_long_long()
  * zend_jit_needs_call_chain()
  * skip_valid_arguments()
  * zend_ssa_cv_info()
  * zend_jit_may_avoid_refcounting()
  * zend_get_known_property_info()
  * zend_may_be_dynamic_property()
- Move common definitions from zend_jit_x86.dasc and
  zend_jit_arm64.dasc into zend_jit.c
  * GCC_GLOBAL_REGS
  * PROFITABILITY_CHECKS
  * BP_JIT_IS
  * sp_adj_kind
  * sp_adj[]
- Remove unused DynAsm macros
  * ADDR_CMP (arm64)
- Inline and remove DynAsm macros used once
  * LOAD_BASE_ADDR (arm64 and x86)
  * PUSH_BASE_ADDR (x86)
  * MEM_OP3_3 (x86)
  * SET_Z_PTR (x86)
- Rename DynAsm macros
  * MEM_LOAD_OP_STORE -> MEM_UPDATE (arm64)
  * MEM_LOAD_OP_STORE_ZTS - > MEM_UPDATE_ZTS (arm64)
  * ADDR_OP1 -> PUSH_ADDR (x86)
  * ADDR_OP2_2 -> ADDR_STORE and ADDR_CMP (x86)
  * MEM_OP2_1_ZTS -> MEM_STORE_ZTS, MEM_CMP_ZTS, MEM_UPDATE_ZTRS (x86)
  * MEM_OP2_2 -> MEM_LOAD and MEM_LOAD_OP (x86)
  * MEM_OP2_2_ZTS -> MEM_LOAD_ZTS and MEM_LOAD_OP_ZTS (x86)
  * SSE_AVX_OP -> DOUBLE_CMP (x86)
  * SSE_GET_LONG -> DOUBLE_GET_LONG (x86)
  * SSE_GET_ZVAL_LVAL -> DOUBLE_GET_ZVAL_LVAL (x86)
  * SSE_GET_ZVAL_LVAL -> DOUBLE_GET_ZVAL_LVAL (x86)
  * SSE_GET_ZVAL_DVAL -> DOUBLE_GET_ZVAL_DVAL (x86)
  * SSE_SET_ZVAL_DVAL -> DOUBLE_SET_ZVAL_DVAL (x86)
2021-06-03 14:05:01 +03:00
Dmitry Stogov
5de50e2817 Separate common code 2021-06-03 00:47:40 +03:00
Hao Sun
467801d7bb JIT/AArch64: Code refactoring for macros (#7082)
* JIT/AArch64: Code refactoring for macros

Update the comments and rename arguments for some macros.

The following macros are renamed:
  SAFE_MEM_ACC_WITH_UOFFSET  -> MEM_ACC_64_WITH_UOFFSET
  SAFE_MEM_ACC_WITH_UOFFSET_32  -> MEM_ACC_32_WITH_UOFFSET
  SAFE_MEM_ACC_WITH_UOFFSET_BYTE -> MEM_ACC_8_WITH_UOFFSET
  MEM_STORE_BYTE_ZTS -> MEM_STORE_8_ZTS
  MEM_STORE_ZTS -> MEM_STORE_64_ZTS
  MEM_LOAD_ZTS -> MEM_LOAD_64_ZTS
  MEM_LOAD_BYTE_ZTS -> MEM_LOAD_8_ZTS
  ADD_IP_FROM_CST -> ADD_IP_WITH_CONST

The following macros are deprecated and removed:
  SET_Z_PTR, GET_Z_W2, SET_Z_W2

Change-Id: I767cf70f373e5f5a1090079e70f8e953a654da00

* Use MEM_ACCESS_*_WITH_UOFFSET

It's more accurate to use "MEM_ACCESS_*_WITH_UOFFSET" than
"MEM_ACC_*_WITH_UOFFSET".

Change-Id: I71479a809008848b61c4786016e6c10110e6aa8b

* Revert the updates for macros ADD_IP_WITH_CONST and LONG_ADD_SUB_WITH_IMM

As pointed by Dmitry, (int32_t) (1LL << 32) would make the assertion
"TRUE", which is not expected by us.

Change-Id: I767cf70f373e5f5a1090079e70f8e953a654da00
2021-06-02 22:32:17 +08:00
Dmitry Stogov
4a095a0252 Resolve CG(map_ptr_base) in disassembler 2021-06-02 15:17:41 +03:00
George Peter Banyard
b6958bb847 Implement "Deprecate implicit non-integer-compatible float to int conversions" RFC. (#6661)
RFC: https://wiki.php.net/rfc/implicit-float-int-deprecate

Co-authored-by: Nikita Popov <nikita.ppv@gmail.com>
2021-05-31 15:48:45 +01:00
Nikita Popov
445b649228 Fix bug #81090 in JIT as well 2021-05-31 12:39:36 +02:00
Hao Sun
e7be7f3f6c JIT/AArch64: Use ZR directly to zero FP register (#7081)
Zero register, i.e. xzr, can be used directly to zero FP register.

TODO: FMOV from ZR may be slow on some cores and the preferred
instructio is MOVI with immediate zero [1]. However, MOVI is not
recoginized by DynASM/arm64.

[1] https://gcc.gnu.org/git/?p=gcc.git;a=commitdiff;h=523d72071960

Change-Id: I0eaee4445e05adb45c6bb80ddb62ea02cdc9f4db
2021-05-31 16:47:26 +08:00
Hao Sun
66826f644d JIT/AArch64: Use D registers for floating-point operations (#7080)
In AArch64, 32 registers, i.e. v0~v31, can be used by the SIMD and
floating-point operations. [1][2]

In PHP the floating-point operations use 64-bit DOUBLE type, and SIMD
operations are not supported currently. Hence we can use D registers
directly.

Note that "ZREG_V*" is kept to denote the register index.

[1]
https://developer.arm.com/documentation/den0024/a/ARMv8-Registers/NEON-and-floating-point-registers/Scalar-register-sizes
[2]
2bcab1e3b2/aapcs64/aapcs64.rst (612simd-and-floating-point-registers)

Change-Id: I286ce07a49e837b560e3401c742ec91fc561546b
2021-05-31 14:28:33 +08:00
Hao Sun
7c2a3a9400 JIT/AArch64: [macos][ZTS] Support fast path for tlv_get_addr (#7042)
* JIT/AArch64: [macos][ZTS] Support fast path for tlv_get_addr

Access to TLV(thread local variable) in macOS is in "dynamic" form and
function tlv_get_addr() is invoked to resolve the address. See the
example in [1].

Note there is one struct TLVDescriptor [2] for each TLV. The first
member holds the address of function tlv_get_addr(), and the other two
members, "key" and "offset", would be used inside tlv_get_addr().

The disassembly code for function tlv_get_addr() is shown in [3]. With
the value from system register, i.e. tpidrro_el0, together with "key"
and "offset", the TLV address can be obtained.

Note that the value from tpidrro_el0 varies for different threads, and
unique address for TLV is resolved.

It's worth noting that slow path would be executed, i.e. function
tlv_allocate_and_initialize_for_key(), for the first time of TLV access.

In this patch:
1. "_tsrm_ls_cache" is guaranteed to be accessed before any VM/JIT code
during the request startup, e.g. in init_executor(), therefore, slow
path can be avoided.

2. As TLVDecriptor is immutable and zend_jit_setup() executes once, we
get this structure in tsrm_get_ls_cache_tcb_offset(). Note the 'ldr'
instruction would be patched to 'add' by the linker.

3. Only fast path for tlv_get_addr() is implemented in macro
LOAD_TSRM_CACHE.

With this patch, all ~4k test cases can pass for ZTS+CALL in macOS on
Apple silicon.

[1] https://gist.github.com/shqking/4aab67e0105f7c1f2c549d57d5799f94
[2]
https://opensource.apple.com/source/dyld/dyld-195.6/src/threadLocalVariables.c.auto.html
[3] https://gist.github.com/shqking/329d7712c26bad49786ab0a544a4af43

Change-Id: I613e9c37e3ff2ecc3fab0f53f1e48a0246e12ee3
2021-05-31 14:27:00 +08:00
Anatol Belski
56c16334e5 ext: Cleanup some dead assignments
Signed-off-by: Anatol Belski <ab@php.net>
2021-05-29 13:03:32 +02:00
Nikita Popov
ea256a218b Add %0 format to run-tests.php
This format matches against null bytes, and prevents the test
expectation from being interpreted as binary data.

bless_tests.php will automatically replace \0 with %0 as well.
2021-05-29 11:33:13 +02:00
Máté Kocsis
48981f4f1e Declare tentative return types for ext/standard (#7065) 2021-05-28 15:46:04 +02:00
Nikita Popov
010d6a491c Convert SKIPIF -> EXTENSIONS in new opcache test 2021-05-27 16:33:30 +02:00
Dmitry Stogov
a50a1b643e Merge branch 'PHP-8.0'
* PHP-8.0:
  Fixed bug #81051 (Broken property type handling after incrementing reference)
2021-05-27 15:23:20 +03:00