Now GDB correctly shows backtraces that involves JIT-ed code for
functional/tracing JIT, HYBRID/CALL VM, x86/AArch64 CPU.
(opcache.jit_debug=0x100 should be set).
Now GDB correctly shows backtraces that involves JIT-ed code for
functional/tracing JIT, HYBRID/CALL VM, x86/AArch64 CPU.
(opcache.jit_debug=0x100 should be set).
The object hash is not particularly useful (anymore) and just
clutters the output. It encodes the same information as the
object ID, which is already part of the output.
"(struct.._offset+offsetof(zend_..struct, field))" might exceed the
range of ADD_SUB_IMM, leading to DynASM error DASM_S_RANGE_I for
ZTS+CALL test variant.
Using macro ADD_SUB_64_WITH_CONST_32 would fix it.
Change-Id: I3233cefbcd1ddea16e7de6725c2dc5ff43373916
As suggested by Dmitry, macro CMP_32_WITH_CONST is not necessary because
Z_TYPE_P(val) is of uchar type and it can be encoded as the imm field of
'cmp' instruction directly.
Change-Id: Icb8f9ee847b9a08cb1e9127e7faf6c89d1431922
Macro GET_ZVAL_LVAL is optimized in commit 6e3443d, using 'reg' as the
temporary register. However, the assertion would fail for "jit=1205".
This patch reverts this optimization for GET_ZVAL_LVAL.
Change-Id: Iecb134fa9438ef993e6393974caa5710657a462e
For macro "SAFE_MEM_ACC_WITH_UOFFSET* ldr/ldrb", the target register can
be used as temporary register to load the offset if needed. Hence one
temporary register is saved for macros LONG_CMP, GET_ZVAL_LVAL,
CMP_ZVAL_TYPE, IF_ZVAL_TYPE and IF_NOT_ZVAL_TYPE.
Change-Id: I43f35186cec9a4157bc73b1cae6643aa59140de2
Offset "Z_OFFSET(op1_addr)" might be loaded into temporary registers for
two times, i.e. by these two SAFE_MEM_ACC_WITH_UOFFSET respectively.
This patch removes this case.
Change-Id: Ib1fde9c9a39f6b5f1ca322dc27b0a9d9d51fbef0
Macros PUSH_BASE_ADDR, PUSH_ADDR_ZTS, GET_ZVAL_W2, SET_ZVAL_W2,
IS_32BIT, PUSH_ADDR and PUSH_ZVAL_ADDR are 32-bit platform dependent in
the x86 implementation, hence they are derepcated in AArch64.
Macro ADDR_OP1 is only used by PASH_* macros, and it is deprecated in
AArch64.
Macros MEM_OP3_3 and AVX_OP are platform dependent and they are not used
in AArch64.
Macro LONG_OP_WITH_32BIT_CONST is replaced with LONG_ADD_SUB_WITH_IMM.
Macro DOUBLE_OP is not used because we use temporary FP register to load
the value from address firstly and then conduct FP math operations with
the help of DOUBLE_MATH_REG.
Macro LONG_MUL is deprecated. MUL between two LONG values is implemented
in a different way from ADD or SUB mainly because extra temporary
register is needed in order to detect integer overflow. See function
zend_jit_math_long_long().
Change-Id: I249f28820aaa86c7638ecf3eee08f8750a232397
Macros CMP_*_WITH_CONST were introduced in [1]. We revisit all the uses
of 'cmp' instructions with constants, and apply these macros if
possible.
[1] https://github.com/php/php-src/commit/66ba9af
Change-Id: Idd233cb9afba84dd106fcc5ee8bf5417d91989c7
Macros ADD_SUB_*_WITH_CONST* were introduced in [1], but it would be
more accurate to use ADD_SUB_IMM even though ADD_SUB_IMM == CMP_IMM.
Regarding the definition of ADD_SUB_IMM, the comment is updated since it
is used to guard 'subs' and adds' instructions as well.
[1] https://github.com/php/php-src/commit/0609b97
Change-Id: I102ebbf626a438da061f6c01b01029807de1ff14
Currently temporary register TMP3 is used in particular for ZTS mode.
Hence it would be better not to use it in other sites except ZTS.
In this patch, the value in TMP1, i.e. "REG1 + IP", might be clobbered
and should be calcauted again.
Change-Id: I17434d4f4b8d6f1e71f49eadb42e06db975d7bbe
