From 2289af889cf5ed029ca49ea06342837e450adac4 Mon Sep 17 00:00:00 2001 From: Dmitry Stogov Date: Mon, 12 Feb 2024 12:24:48 +0300 Subject: [PATCH] Update IR IR commit: ab6ebce1cc25f7d2c634bd13af043f76d6ef524e --- ext/opcache/jit/ir/ir_aarch64.dasc | 2 ++ ext/opcache/jit/ir/ir_fold.h | 16 ++++++++++++++++ ext/opcache/jit/ir/ir_x86.dasc | 11 +++++++++-- 3 files changed, 27 insertions(+), 2 deletions(-) diff --git a/ext/opcache/jit/ir/ir_aarch64.dasc b/ext/opcache/jit/ir/ir_aarch64.dasc index 3dabfeb0dfc..01f5898b7d9 100644 --- a/ext/opcache/jit/ir/ir_aarch64.dasc +++ b/ext/opcache/jit/ir/ir_aarch64.dasc @@ -2117,6 +2117,7 @@ static void ir_emit_sdiv_pwr2(ir_ctx *ctx, ir_ref def, ir_insn *insn) uint32_t shift = IR_LOG2(ctx->ir_base[insn->op2].val.u64); int64_t offset = ctx->ir_base[insn->op2].val.u64 - 1; + IR_ASSERT(shift != 0); IR_ASSERT(IR_IS_CONST_REF(insn->op2)); IR_ASSERT(!IR_IS_SYM_CONST(ctx->ir_base[insn->op2].op)); IR_ASSERT(def_reg != IR_REG_NONE && op1_reg != IR_REG_NONE && def_reg != op1_reg); @@ -2173,6 +2174,7 @@ static void ir_emit_smod_pwr2(ir_ctx *ctx, ir_ref def, ir_insn *insn) // uint32_t shift = IR_LOG2(ctx->ir_base[insn->op2].val.u64); uint64_t mask = ctx->ir_base[insn->op2].val.u64 - 1; + IR_ASSERT(mask != 0); IR_ASSERT(IR_IS_CONST_REF(insn->op2)); IR_ASSERT(!IR_IS_SYM_CONST(ctx->ir_base[insn->op2].op)); IR_ASSERT(def_reg != IR_REG_NONE && tmp_reg != IR_REG_NONE && def_reg != tmp_reg); diff --git a/ext/opcache/jit/ir/ir_fold.h b/ext/opcache/jit/ir/ir_fold.h index 08f186dda25..3d0e0dcdfbc 100644 --- a/ext/opcache/jit/ir/ir_fold.h +++ b/ext/opcache/jit/ir/ir_fold.h @@ -1608,6 +1608,22 @@ IR_FOLD(DIV(_, C_I64)) IR_FOLD_NEXT; } +IR_FOLD(MOD(_, C_U8)) +IR_FOLD(MOD(_, C_U16)) +IR_FOLD(MOD(_, C_U32)) +IR_FOLD(MOD(_, C_U64)) +IR_FOLD(MOD(_, C_I8)) +IR_FOLD(MOD(_, C_I16)) +IR_FOLD(MOD(_, C_I32)) +IR_FOLD(MOD(_, C_I64)) +{ + if (op2_insn->val.i64 == 1) { + /* a % 1 => 0 */ + IR_FOLD_CONST_U(0); + } + IR_FOLD_NEXT; +} + IR_FOLD(DIV(_, C_DOUBLE)) { if (op2_insn->val.d == 1.0) { diff --git a/ext/opcache/jit/ir/ir_x86.dasc b/ext/opcache/jit/ir/ir_x86.dasc index 8cc747d5733..e7a518fcdbe 100644 --- a/ext/opcache/jit/ir/ir_x86.dasc +++ b/ext/opcache/jit/ir/ir_x86.dasc @@ -3787,6 +3787,7 @@ static void ir_emit_sdiv_pwr2(ir_ctx *ctx, ir_ref def, ir_insn *insn) uint32_t shift = IR_LOG2(ctx->ir_base[insn->op2].val.u64); int64_t offset = ctx->ir_base[insn->op2].val.u64 - 1; + IR_ASSERT(shift != 0); IR_ASSERT(IR_IS_CONST_REF(insn->op2)); IR_ASSERT(!IR_IS_SYM_CONST(ctx->ir_base[insn->op2].op)); IR_ASSERT(op1_reg != IR_REG_NONE && def_reg != IR_REG_NONE && op1_reg != def_reg); @@ -3849,6 +3850,7 @@ static void ir_emit_smod_pwr2(ir_ctx *ctx, ir_ref def, ir_insn *insn) uint32_t shift = IR_LOG2(ctx->ir_base[insn->op2].val.u64); uint64_t mask = ctx->ir_base[insn->op2].val.u64 - 1; + IR_ASSERT(shift != 0); IR_ASSERT(IR_IS_CONST_REF(insn->op2)); IR_ASSERT(!IR_IS_SYM_CONST(ctx->ir_base[insn->op2].op)); IR_ASSERT(def_reg != IR_REG_NONE && tmp_reg != IR_REG_NONE && def_reg != tmp_reg); @@ -3868,8 +3870,13 @@ static void ir_emit_smod_pwr2(ir_ctx *ctx, ir_ref def, ir_insn *insn) ir_emit_mov(ctx, type, tmp_reg, def_reg); } - | ASM_REG_IMM_OP sar, type, tmp_reg, (ir_type_size[type]*8-1) - | ASM_REG_IMM_OP shr, type, tmp_reg, (ir_type_size[type]*8-shift) + + if (shift == 1) { + | ASM_REG_IMM_OP shr, type, tmp_reg, (ir_type_size[type]*8-1) + } else { + | ASM_REG_IMM_OP sar, type, tmp_reg, (ir_type_size[type]*8-1) + | ASM_REG_IMM_OP shr, type, tmp_reg, (ir_type_size[type]*8-shift) + } | ASM_REG_REG_OP add, type, def_reg, tmp_reg |.if X64